# Memory Layout Analysis# Voltage MembraneTotal=Co×Hv×WvTotal=Co \times H_v \times W_vTotal=Co×Hv×WvBurst=HkBurst=H_kBurst=Hk# Kernel WeightTotal=Co×Ci×Hk×WkTotal=Co \times Ci \times H_k \times W_kTotal=Co×Ci×Hk×WkBurst=Ci×S×Hk×WkBurst=Ci \times S \times H_k \times W_kBurst=Ci×S×Hk×Wk# MixedParameterUnit=Hv×WvHk×Wk+CiParameter\ Unit =\frac{H_v \times W_v}{H_k \times W_k} + CiParameter Unit=Hk×WkHv×Wv+Ci FPGA SpinalHDL